
BU9847GUL-W (4Kbit)
Datasheet
● I/O peripheral circuit
○ Pull up resistance of SDA terminal
SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (R PU ), select an appropriate value to
this resistance value from microcontroller V IL , I L , and V OL -I OL characteristics of this IC. If R PU is large, action frequency is
limited. The smaller the R PU , the larger the consumption current at action.
○ Maximum value of R PU
The maximum value of R PU is determined by the following factors.
(1) SDA rise time to be determined by the capacity (CBUS) of bus line of R PU and SDA should be tR or below.
And AC timing should be satisfied even when SDA rise time is late.
(2) The bus electric potential A to be determined by input leak total (I L ) of device connected to bus at output of “H” to
SDA bus and R PU should sufficiently secure the input “H” level (V IH ) of microcontroller and EEPROM including
recommended noise margin 0.2Vcc.
V CC -I L R PU -0.2 V CC ≧ V IH
Microcontroller
BU9847GUL-W
∴
R PU ≦
0.8V CC -V IH
I L
R PU
Ex.) When V CC =3V, I L =10 μ A, V IH =0.7 Vcc
from (2)
A
SDA terminal
10×10
R PU ≦
0.8×3-0.7×3
-6
IL
Bus line
IL
≦
○ Minimum value of R PU
300 [ k ? ]
capacity CBUS
Figure 44. I/O circuit diagram
The minimum value of R PU is determined by the following factors.
(1) When IC outputs LOW, it should be satisfied that V OLMAX = 0.4V and I OLMAX = 3mA.
V CC -V OL
R PU
≦ I OL
∴ R PU ≧
V CC -V OL
I OL
(2) V OLMAX = 0.4V should secure the input “L” level (VIL) of microcontroller and EEPROM including recommended noise
margin 0.1V CC .
V OLMAX ≦ V IL – 0.1V CC
Ex.) When V CC = 3V, V OL = 0.4V, I OL = 3mA, microcontroller, EEPROM V IL = 0.3V CC
3 x 10
From (1),
∴ R PU ≧
3-0.4
-3
≧ 867[ ? ]
And
V OL = 0.4[V]
V IL = 0.3 x 3
=0.9 [V]
Therefore, the condition (2) is satisfied.
○ Pull up resistance of SCL terminal
When SCL control is made at CMOS output port, there is no need, but in the case there is timing where SCL becomes
“Hi-Z”, add a pull up resistance. As for the pull up resistance, one of several k ? to several ten k ? is recommended in
consideration of drive performance of output port of microcontroller.
● A2, WP process
○ Process of device address terminals (A2)
Check whether the set device address coincides with device address input sent from the master side or not, and select
one among plural devices connected to a same bus. Connect this terminal to pull up of pull down, or V CC or GND.
○ Process of WP terminal
WP terminal is the terminal that prohibits and permits write in hardware manner. In “H” status, only READ is available and
WRITE of all addresses is prohibited. In the case of “L”, both are available. In the case to use it as an ROM, it is
recommended to connect it to pull up or V CC . In the case to use both READ and WRITE, control WP terminal or connect it
to pull down or GND.
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TSZ22111 ? 15 ? 001
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TSZ02201-0R2R0G100480-1-2
4.SEP.2012 Rev.001